Memory devices are typically provided as internal, semiconductor, integrated circuits in computers or other electronic devices. There are many different types of memory including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), and flash memory.
Flash memory devices have developed into a popular source of non-volatile memory for a wide range of electronic applications. Flash memory devices typically use a one-transistor memory cell that allows for high memory densities, high reliability, and low power consumption. Changes in threshold voltage of the cells, through programming of charge storage nodes, such as floating gates or trapping layers or other physical phenomena, determine the data value of each cell. Common uses for flash memory include personal computers, personal digital assistants (PDAs), digital cameras, digital media players, digital recorders, games, appliances, vehicles, wireless devices, cellular telephones, and removable memory modules, and the uses for flash memory continue to expand.
Flash memory typically utilizes one of two basic architectures known as NOR flash and NAND flash. The designation is derived from the logic used to read the devices. In NOR flash architecture, a column of memory cells are coupled in parallel with each memory cell coupled to a data line, such as that commonly referred to as a bit line. In NAND flash architecture, a string of memory cells are coupled in series with only the first memory cell of the column coupled to a bit line.
As the performance of electronic systems employing flash memory devices increases, flash memory device performance should also increase. A performance increase includes reducing power consumption, increasing speed, and increasing the memory density. Further, supply voltages are dropping, and there is an increased likelihood that leakage will occur given the tight controls on allowed voltages. This leads to problems with cutoff in string drivers, which drive the access line (e.g., word line) voltages of memories, and in cutoff of cells during boosting to decrease bit line to bit line leakage.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for memory devices having improved device isolation and cutoff performance.